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SyncMOS Technologies International, Inc.
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
Product List
SM894051L25, 25 MHz 4KB internal memory MCU SM894051C25, 25 MHz 4KB internal memory MCU SM894051C40, 40 MHz 4KB internal memory MCU
Feature
Working voltage: 3.0V ~ 3.6V For L Version 4.5V ~ 5.5V For C Version General 8051 family compatible 12 clocks per machine cycle 4 KB internal flash memory 128 bytes internal RAM Two 16 bits timers/counters 15 programmable I/O lines Full duplex serial UART channel Bit operation instruction Industrial Level 8-bits unsigned division 8-bits unsigned multiply BCD arithmetic Direct addressing Indirect addressing Two priority level interrupt Power save modes: Idle mode Power down mode (provide H/W wake-up function) Code protection function One watch dog timer (WDT) On-chip Analog Comparator Direct LED Drive Output (Default = 1)
General Description
The SM894051 series product is an 8-bits single chip micro controller with 4KB flash embedded. It provides hardware features and a powerful instruction set, necessary to make it a versatile and cost effective controller for those applications demand up to 15 I/O pins or need up to 4KB flash memory either for program or for data or mixed. To program the flash block, a commercial programmer is capable to do it.
Ordering Information
SM894051ihhkL yymmv i: process identifier {L=3.0V~3.6V,C=4.5V~ 5.5V} hh: working clock in MHz {25, 40} k: package type postfix {as below table} yy: year, mm: month v: version identifier {, A, B,...}
L: PB free identifier {no text is Non-PB free, "P" is PB free}
Postfix P S
Package 20L PDIP 20L SOIC
Pin / Pad Configuration Page 2 Page 2
Dimension Page 14 Page 15
Taiwan 6F, No.10-2 Li- Hsin 1st Road , Science-based Industrial Park, Hsinchu, Taiwan 30078 TEL: 886-3-567-1820 886-3-567-1880 FAX: 886-3-567-1891 886-3-567-1894
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 1
SyncMOS Technologies International, Inc.
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
Pin Configuration
Figure 1 20L PDIP Package
Figure 2 20L SOIC Package
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 2
SyncMOS Technologies International, Inc.
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
Block Diagram
RAM Address Decoder & Register 128 bytes Timer 0 Timer 1
RAM
UART
Interrupt
Buffer
WDT
Stack Point
Acc
B PC Incrementer
RES
Reset Circuit
TMP1
TMP2 Program Counter
Timing Control
Instruction Register
ALU DPTR
Program XTAL2 XTAL1 OSC PSW Register
4K Port 1 Latch + Analog Comparator Port 1 Driver & Mux Port 3 Driver & Mux Port 3 Latch bytes Flash Memory
P1.0
P1.1
P3.0 ~ p3.5 & p3.7
Specifications subject to change without notice contact your sales representatives for the most recent information.
3
SM894051 V1.4 09 /2006
SyncMOS Technologies International, Inc.
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
Pin Description (20L PDIP / 20L SOIC)
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
$F8 $F0 $E8 $E0 $D8 $D0 $C8 $C0 $B8 $B0 $A8 $A0 $98 $90 $88 $80 SCON 0000 0000 P1 1111 1111 TCON 0000 0000 SBUF xxxx xxxx LEDENP1 0000 0000 TL1 0000 0000 DPH 0000 0000 LEDENP3 0000 0000 TH1 0000 0000 WDTC 0x0x x000 WDTKEY 0000 0000 IP 0000 0000 P3 1111 1111 IE 0000 0000 SCONF 0xxx xxxx PSW 0000 0000 ACC 0000 0000 B 0000 0000
Symbol RST P3.0/RXD P3.1/TXD XTAL2 XTAL1 P3.2/#INT0 P3.3/#INT1 P3.4/T0 P3.5/T1 VSS P3.7 P1.0/AIN0 P1.1/AIN1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 VDD
Active H
-/L -/L
I/O i i/o i/o o i i/o i/o i/o i/o
i/o i/o i/o i/o i/o i/o i/o i/o i/o
Names Reset bit 0 of port 3 & receive data bit 1 of port 3 & transmit data Crystal out Crystal in bit 2 of port 3 & low true interrupt 0 bit 3 of port 3 & low true interrupt 1 bit 4 of port 3 & timer 0 bit 5 of port 3 & timer 1 Sink Voltage, Ground bit 7 of port 3 bit 0 of port 1 & positive 0 of the on chip analog comparator bit 1 of port 1 & positive 1 of the on chip analog comparator bit 2 of port 1 bit 3 of port 1 bit 4 of port 1 bit 5 of port 1 bit 6 of port 1 bit 7 of port 1 Drive voltage, +5 Vcc
$FF $F7 $EF $E7 $DF $D7 $CF $C7 $BF $B7 $AF $A7 $9F $97 $8F PCON 0000 0000 $87
Special Function Register (SFR) Memory Map
TMOD 0000 0000 SP 0000 0111
TL0 0000 0000 DPL 0000 0000
TH0 0000 0000 (Reserved)
Note: The text of SFRs with bold type characters are Extension Special Function Registers for SM894051
Specifications subject to change without notice contact your sales representatives for the most recent information.
4
SM894051 V1.4 09 /2006
SyncMOS Technologies International, Inc.
Addr 93H 95H 97H 9FH BFH SFR LEDENP1 LEDENP3 WDTKEY WDTC SCONF Reset 00H 00H 00H 0*0**000 0******0 7 LEDEN P17 LEDEN P37 WDT KEY7 WDTE WDR 6 LEDEN P16 Unused WDT KEY6 Reserve Unused 5 LEDEN P15 LEDEN P35 WDT KEY5 CLEAR Unused 4 LEDEN P14 LEDEN P34 WDT KEY4 Unused Unused 3 LEDEN P13 LEDEN P33 WDT KEY3 Unused Unused 2 LEDEN P12 LEDEN P32 WDT KEY2 PS2 Reserve
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
1 LEDEN P11 LEDEN P31 WDT KEY1 PS1 Unused
0 LEDEN P10 LEDEN P30 WDT KEY0 PS0 ALEI
Operating Conditions
Symbol TA VCC5 VCC3.3 Fosc 25 Fosc 40 Description Operating temperature Supply voltage Supply voltage Oscillator Frequency Oscillator Frequency Min. -40 4.5 3.0 Typ. 25 5.0 3.3 Max. 85 5.5 3.6 25 40 Unit. V V MHz MHz Remarks Ambient temperature under bias
For 3.3V application For 5.0V application
DC Characteristic
VCC = 5V (10%), VSS=0V TA= -40 to 85
SYMBOL VCC ICC IID IPD VIL1 VIL2 VIH1 VIH2 IIL ITL ILI VOL1 VOL2 VOH1 ISK1 ISK2 ISR1 RRST CIO Supply Voltage Supply current operating Supply current IDLE Mode Supply current Power-Down MODE Input LOW voltage, P1, P3 Input LOW voltage, RES, XTAL1 Input HIGH voltage, P1, P3 Input HIGH voltage, RES, XTAL1 Input current LOW level, P3.0~P3.5, P3.7 Transition current High to Low, P3.0~P3.5, P3.7 Input leakage current, P1.0~P1.1 Output LOW voltage, P1.2~P1.7, P3.0~P3.5, P3.7 Output LOW voltage, P1.0~P1.1 Output High voltage, P3.0~P3.5, P3.7 Output High voltage, P1.2~P1.7 Sink Current P1, P3 Sink Current P1, P3 (LEDD Enable) Source Current P1, P3 Internal RESET pull-down resistor Pin capacitance See notes 1 fCLK = 12MHz VCC = 5.5V See note 2 fCLK = 12MHz VCC = 5.5V P1.0 & P1.1 =0V See note 3VCC (= 5.5V) P1.0 & P1.1 =0V INPUT -0.5 0 2.0 70%VCC VIN = 0.45V VIN = 2.0 V 0.45V < VIN < VCC-0.3V OUTPUT IOL = 8mAVCC=5.0V IOL = 6.5mAVCC =5.0V IOH = -80uAVCC =5.0V IOH = -80uAVCC =5.0V VCC = 5.0V, VIN = 0.4 V VCC = 5.0V, VIN = 0.4 V VCC = 5.0V, VIN = 2.4 V VIN = 5.0 V Test freq=1MHz, TA=25 2.4 2.4 6 20 -150 300 10 PARAMETER TEST CONDITIONS 4.5 LIMITS MIN 5.5 15 5 20 0.8 0.8 Vcc+0.5 Vcc+0.5 -50 -650 10 0.45 0.45 MAX UNIT V mA mA A V V V V A A A V V V V mA mA uA k pF
50
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 5
SyncMOS Technologies International, Inc.
VCC = 3.3V (10%), VSS=0V , TA= -40 to 85
SYMBOL VCC ICC IID IPD VIL1 VIL2 VIL3 VIH1 VIH2 VIH3 IIN1 ITL ILI Supply Voltage Supply current operating Supply current IDLE Mode Supply current Power-Down MODE Input LOW voltage, P1, P3 Input LOW voltage, RST Input LOW voltage, XTAL1 Input HIGH voltage, P1, P3 Input HIGH voltage, RST Input HIGH voltage, XTAL1 See note 1 fCLK = 12MHz VCC = 3.6V See note 2 fCLK = 12MHz VCC = 3.6V P1.0 & P1.1 =0V See note 3VCC (= 3.6V) P1.0 & P1.1 =0V INPUT VCC = 3.6V VCC = 3.6V VCC = 3.6V VCC = 3.6V VCC = 3.6V PARAMETER TEST CONDITIONS 3.0 LIMITS MIN 3.6 5.5 2 5 0 0 0 0.6 VCC -0.4 0.6 VCC -0.4 0.8 VCC -10 -75 -10
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
UNIT V mA mA A V V V V V V A A A
MAX
0.2 VCC -0.2 0.2 VCC -0.2 0.2 VCC -0.2 VCC + 0.2 VCC + 0.2 VCC + 0.2 50 400 10
VOL1 VOL2 VOH1 ISK1 ISK2 ISR1 RRST CIO
VCC = 3.6V VCC = 3.0V ~3.6V, Input current LOW level P1, P3 VIN = 0.45V. See note 4 Transition current High to Low P3.0~P3.5, P3.7 VCC = 3.6V, VIN = 2.0 V VCC = 3.0V ~3.6V, Input leakage current P1.0~P1.1 0.45V0.4 0.4 2.4 2.4 4 12 -80 300 10
V V V V mA mA uA k pF
50
NOTES FOR DC ELECTRICAL CHARACTERISTICS 1. The operating supply current is measured with all output disconnected; XTAL1 driven with tr = tf = 5ns; VIL = VSS+0.5V; VIH=VCC-0.5V; XTAL2 not connect; 2. The IDLE MODE supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 5ns; VIL = VSS+0.5V; VIH=VCC-0.5V; XTAL2 not connect; 3. The POWER-DOWN MODE supply current is measured with all output pins disconnected; VIL = VSS+0.5V; VIH=VCC-0.5V; XTAL2 not connect; 4. Port 1, 3 source a transition current when they are being externally driven from HIGH to LOW. The transition current reaches its maximum value when VIN is approximately 2V. 5. Under steady state (non-transient) conditions, IOL must be externally
Limited as follows: Maximum IOL per port pin: 20mA Maximum total IOL for all output pins: 80mA
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 6
SyncMOS Technologies International, Inc.
ICC Active Mode Test Circuit:
V cc
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
Icc
VDD 11
SM 894051
XTAL2 XTAL1 RST VSS
NC C lo c k S ig n a l V ss
AC Characteristic
VCC=3.3V10%, VSS=0V, tclk min = 1/ fmax(maximum operating frequency) TA= -40 to +85
Symbol FIGURE PARAMETER External Clock drive into XTAL1
tCLK 4 tCLKH 4 tCLKL 4 tCLKR 4 tLLIV 4 tCYC 4 NOTES: 1. Operating at 25MHz. Xtal1 Period Xtal1 HIGH time Xtal1 LOW time XTAL1 rise time XTAL1 fall time Controller cycle time = tCLK / 12 40(Note1) 20 20 3.33 10 10 ns ns ns ns ns ns
MIN
MAX
UNIT
Symbol
tXLXL tQVXH tXHQX tXHDX tXHDV
FIGURE
5 5 5 5 5
PARAMETER UART
Serial port clock time Output data setup to clock rising edge Output data hold after clock rising edge Input data hold after clock rising edge Clock rising edge to input data valid
MIN
12tCLK 10tCLK-133 2tCLK-117 0
MAX
UNIT
ns ns ns ns ns
10tCLK-133
2.0V 0.8V
2.0V Test Points 0.8V
Notes: AC inputs during testing are driven at 2.4V for logic "HIGH" and 0.45V for logic "LOW". Timing measurements are at 2.0V for logic "HIGH" and 0.8V Figure 4 AC Testing Input/Output
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 7
SyncMOS Technologies International, Inc.
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
Instruction ALE
0
1
2
3
4
5
6
7
8
t XLXL CLOCK t XHQX t QVXH TXD 0 1 2 t XHDX t XHDV RxD
VALID VALID VALID VALID VALID VALID VALID VALID
3
4
5
6
7
Figure5 UART waveform in Shift Register MODE
Instruction Set
The SM894051 uses the powerful instruction set of 80C51. It consists of 45 single-byte, 47 two-byte, and 15 threebyte instructions. Among them 65 instruction are executed in 1 machine-cycle, 40 instructions in 2 machine-cycles, and the multiply, 2 instructions in 4 machine-cycles. A summary of the instruction set is given in Table 3.
Addressing Mode
Notes on instruction set and address modes:
Rn direct @Ri #data #data16 addr11 rel bit Register R7-R0 of the currently selected register bank. 8-bits internal data location's address. This could be internal DATA RAM location (0-127) or a SFR [i.e., I/O port, control register, status register, etc. (128-255)] 8-bits RAM location addressed indirectly through register R1 or R0 of the actual register bank 8-bits constant included in the instruction 16-bits constant included in the instruction 11-bits destination address. Used by ACALL and AJMP. The branch can be anywhere within the same 2 Kbytes page of program memory as the first byte of the following instruction. Signed (2's complement) 8-bits offset byte. Used by SJMP and all conditional jumps. Range is -128 to +127 bytes relative to first byte of the following instruction. Direct addressed bit in internal data RAM or SFR
Table 3: A Summary of the instruction set
Mnemonic Arithmetic Instructions ADD A,Rn ADD A,direct ADD A,@Ri ADD A,#data ADDC A,Rn ADDC ADDC ADDC SUBB SUBB SUBB SUBB INC INC INC INC DEC DEC A,direct A,@Ri A,#data A,Rn A,direct A,@Ri A,#data A Rn direct @Ri A Rn OPERATION A = A + Rn A = A + direct A = A + <@Ri> A = A + #data A = A + Rn + C A = A + direct + C A = A + @Ri + C A = A + #data + C A = A Rn C A = A direct C A = A <@Ri> C A = A#data C A=A+1 Rn = Rn + 1 direct = direct + 1 <@Ri> = <@Ri> + 1 A=A 1 Rn = Rn 1 BYTE 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 1 1 CYCLE 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 8
SyncMOS Technologies International, Inc.
DEC DEC INC MUL DIV direct @Ri DPTR AB AB direct = direct 1 <@Ri> = <@Ri> 1 DPTR = DPTR 1 B:A = A x B A = INT (A/B) B = MOD (A/B) Decimal adjust ACC A .AND. Rn A .AND. direct A .AND. <@Ri> A .AND. #data direct .AND. A direct .AND. #data A .OR. Rn A .OR. direct A .OR. <@Ri> A .OR. #data direct .OR. A direct .OR. #data A .XOR. Rn A .XOR. direct A .XOR. <@Ri> A .XOR. #data direct .XOR. A direct .XOR. #data A=0 A = /A Rotate ACC Left 1 bit Rotate Left through Carry Rotate ACC Right 1 bit Rotate Right through Carry Swap Nibbles in A A = Rn A = direct A = <@Ri> A = #data Rn = A Rn = direct Rn = #data direct = A direct = Rn direct = direct direct = <@Ri> direct = #data <@Ri> = A <@Ri> = direct <@Ri> = #data DPTR = #data16 A = code memory[A+DPTR] A = code memory[A+PC] INC SP: MOV "@'SP', < direct > MOV < direct >, "@SP": DEC SP ACC and < Rn > exchange data ACC and < direct > exchange data ACC and < Ri > exchange data ACC and @Ri exchange low nibbles C=0 bit = 0 C=1 bit = 1 C = /C bit = /bit C = C .AND. bit C = C .AND. /bit 2 1 1 1 1 1 1 2 1 2 2 3 1 2 1 2 2 3 1 2 1 2 2 3 1 1 1 1 1 1 1 1 2 1 2 1 2 2 2 2 3 2 2 1 2 2 3 1 1 2 2 1 2 1 1 1 2 1 2 1 2 2 2
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
1 1 2 4 4 1 1 1 1 1 1 2 1 1 1 1 1 2 1 1 1 1 1 2 1 1 1 1 1 1 1 1 1 1 1 1 2 1 1 2 2 2 1 1 2 1 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 2 2
DA A Logical Instructions ANL A,Rn ANL A,direct ANL A,@Ri ANL A,#data ANL direct,A ANL direct,#data ORL A,Rn ORL A,direct ORL A,@Ri ORL A,#data ORL direct,A ORL direct,#data XRL A,Rn XRL A,direct XRL A,@Ri XRL A,#data XRL direct,A XRL direct,#data CLR A CPL A RL A RLC A RR A RRC A SWAP A Data Transfers Instructions MOV A,Rn MOV A,direct MOV A,@Ri MOV A,#data MOV Rn,A MOV Rn,direct MOV Rn,#data MOV direct,A MOV direct,Rn MOV direct,direct MOV direct,@Ri MOV direct,#data MOV @Ri,A MOV @Ri,direct MOV @Ri,#data MOV DPTR,#data16 MOVC A,@A+DPTR MOVC A,@A+PC PUSH direct POP direct XCH A,Rn XCH A,direct XCH A,@Ri XCHD A,@Ri Boolean Instructions CLR C CLR bit SETB C SETB bit CPL C CPL bit ANL C,bit ANL C,/bit
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 9
SyncMOS Technologies International, Inc.
ORL C,bit ORL C,/bit MOV C,bit MOV bit,C JC rel JNC rel JB bit,rel JNB bit,rel JBC bit,rel Jump Instructions ACALL addr11 LCALL addr16 RET RETI AJMP addr11 LJMP addr16 SJMP rel JMP @A+DPTR JZ rel JNZ rel CJNE A, direct,rel CJNZ A, #data,rel CJNZ Rn, #data,rel CJNZ @Ri, #data,rel DJNZ Rn,rel DJNZ direct,rel NOP C = C .OR. bit C = C .OR. /bit C = bit bit = C Jump if C= 1 Jump if C= 0 Jump if bit = 1 Jump if bit = 0 Jump if C = 1 Call Subroutine only at 2k bytes Address Call Subroutine in max 64K bytes Address Return from subroutine Return from interrupt Jump only at 2k bytes Address Jump to max 64K bytes Address Jump on at 256 bytes Jump to A+ DPTR Jump if A = 0 Jump if A 0 Jump if A < direct > Jump if A < #data > Jump if Rn < #data > Jump if @Ri < #data > Decrement and jump if Rn not zero Decrement and jump if direct not zero No Operation 2 2 2 2 2 2 3 3 3 2 3 1 1 2 3 2 1 2 2 3 3 3 3 2 3 1
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
2 2 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1
Limited on Certain Instructions
Branching instructions:
The certain instructions related to branching or jumping should be restricted. When the programmer execute the branching instructions like AJMP, LJMP, ACALL, LCALL, SJMP etc..., they have responsibility to ensure that the destination branching address don't be over internal program memory size. SM894051 contain 4K bytes program memory and its location is from 00H to 0FFFH.
Data Memory, MOVX-related instructions:
SM894051 contains 128 bytes internal data memory, and it doesn't support external data memory access. Therefore, SM894051 doesn't include MOVX instructions.
Limited on down mode wake-up
SM894051 has two ways to wake-up power down mode. One of them is hardware reset. The other one is that using external interrupt (#INT0, #INT1) to wake-up power down mode and the external interrupt must be set for level trigger.
I/O Pin Configuration
Port 1:
The ports P1.2 to P1.7 have internal pull-up resistor. The ports P1.0 to P1.1 are open-drain configuration, so they require external pull-up resistor to pull low. And P1.0 and P1.1 also used as the positive input (AIN0) and the negative input (AIN1) of the on chip analog comparator. As long as the voltage level of P1.0 is greater than P1.1, the output voltage level of the on-chip analog comparator is "1 ". And this result will be stored in the bit 6 of the port 3 SFR.
Port 3:
The Port 3 are 7-bits bi-directional I/O pins which include P3.0 to P3.5 and P3.7. The P3.6 doesn't be used as general purpose I/O pin, and the output pin of the on-chip analog comparator connects to the P3.6 which is hard-wired as an input.
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 10
SyncMOS Technologies International, Inc.
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
I/O are provided with LED driving capacity
LEDEN (LEDENP1, 93H) Bit7 Bit6 LEDEN LEDEN P17 P16 Bit5 LEDEN P15 Bit4 LEDEN P14 Bit3 LEDEN P13 Bit2 LEDEN P12 Bit1 LEDEN P11 Bit0 LEDEN P10
LEDEN (LEDENP3, 95H) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 LEDEN Unused LEDEN LEDEN LEDEN LEDEN LEDEN LEDEN P37 P35 P34 P33 P32 P31 P30 When I/O Ports (Port1 & Port3) output low voltage, they are provided with more sink current (IIL about 20mA) to drive LED by setting LED enable bit. For example, when setting LEDNP1 [0] to high then P1.0 is provided with more sink current (IIL) to drive LED. And so on, each I/O can be set to drive LED by setting correspondent register.
Extension Function Description Watch Dog Timer
The Watch Dog Timer (WDT) is a 16-bits free-running counter that generate reset signal if the counter overflows. The WDT is useful for systems that are susceptible to noise, power glitches, or electronics discharge which causing software dead loop or runaway. The WDT function can help user software recover from abnormal software condition. The WDT is different from Timer0, Timer1 of general 8051. To prevent a WDT reset can be done by software periodically clearing the WDT counter. User should check WDR bit of SCONF register whenever unpracticed reset happened. The purpose of the secure procedure is to prevent the WDTC value from being changed when system runaway. There is a 250KHz RC oscillator embedded in chip. Set WDTE = "1" will enable the RC oscillator and the frequency is independent to the system frequency. To enable the WDT is done by setting 1 to the bit 7 (WDTE) of WDTC. After WDTE set to 1, the 16-bits counter starts to count with the RC oscillator. It will generate a reset signal when overflows. The WDTE bit will be cleared to 0 automatically when SM894051 been reset, either hardware reset or WDT reset. To reset the WDT is done by setting 1 to the CLEAR bit of WDTC before the counter overflow. This will clear the content of the 16-bits counter and let the counter re-start to count from the beginning.
Watch Dog Timer Registers
Watch Dog Key Register WDTKEY ($97) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 WDT KEY7 WDT KEY6 WDT KEY5 WDT KEY4 WDT KEY3 WDT KEY2 WDT KEY1 WDT KEY0 By default, the WDTC is read only. User needs to write values 1EH, 0E1H sequentially to the WDTKEY (97H) register to enable the WDTC write attribute, which is MOV WDTKEY, # 01EH MOV WDTKEY, # 0E1H When WDTC is set, user need to write another values E1H, 1EH sequentially to the WDTKEY (97H) register to disable the WDTC write attribute, That is MOV WDTKEY, # 0E1H MOV WDTKEY, # 01EH
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 11
SyncMOS Technologies International, Inc.
Watch Dog Timer Registers - WDT Control Register WDTC ($9F) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 WDTE Reserve CLEAR Unused Unused PS2 WDTE: Watch Dog Timer enable bit CLEAR: Watch Dog Timer reset bit If CLEAR bit set to1, Watch Dog Timer will be reset. User don't reset value to 0 . PS [2:0] : Overflow period select bits PS2~PS0: clock sourer divider bit PS [2:0] Overflow Period (ms) 000 2.048 001 4.096 010 8.192 011 16.384 100 32.768 101 65.536 110 131.072 111 262.14
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
Bit1 PS1
Bit0 PS0
Watch Dog Timer Register - System Control Register SCONF ($BFH) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 WDR Unused Unused Unused Unused Reserved Unused Unused WDR: Watch Dog Timer Reset. When system reset by Watch Dog Timer overflow, WDR will be set to 1 ALEI: ALE output inhibit bit, to reduce EMI Setting bit 0 (ALEI) of SCONF can inhibit the clock signal in Fosc/6Hz output to the ALE pin. The bit 7 (WDR) of SCONF is Watch Dog Timer Reset bit. It will be set to 1 when reset signal generated by WDT overflow. User should check WDR bit whenever unpredicted reset happened.
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 12
SyncMOS Technologies International, Inc.
Application Reference X'tal C1 C2 R X'tal C1 C2 R 3MHz 30 pF 30 pF open 16MHz 30 pF 30 pF open Valid for SM894051 6MHz 9MHz 30 pF 30 pF 30 pF 30 pF open open 25MHz 15 pF 15 pF 62K 33MHz 5 pF 5 pF 6.8K 12MHz 30 pF 30 pF open 40MHz 2 pF 2 pF 4.7K
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 13
SyncMOS Technologies International, Inc.
20L 300mil PDIP Information
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 14
SyncMOS Technologies International, Inc.
SM894051
8-Bits Micro-controller With 4KB Flash ROM embedded
20L 300mil SOIC Information
Specifications subject to change without notice contact your sales representatives for the most recent information.
SM894051 V1.4 09 /2006 15

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